A van der Waals interfacial junction transistor for reconfigurable fuzzy logic hardware | Nature Electronics

Nature Electronics (2024)Cite this article

Metrics details

Edge devices face challenges when implementing deep neural networks due to constraints on their computational resources and power consumption. Fuzzy logic systems can potentially provide more efficient edge implementations due to their compactness and capacity to manage uncertain data. However, their hardware realization remains difficult, primarily because implementing reconfigurable membership function generators using conventional technologies requires high circuit complexity and power consumption. Here we report a multigate van der Waals interfacial junction transistor based on a molybdenum disulfide/graphene heterostructure that can generate tunable Gaussian-like and π-shaped membership functions. By integrating these generators with peripheral circuits, we create a reconfigurable fuzzy controller hardware capable of nonlinear system control. This fuzzy logic system can also be integrated with a few-layer convolution neural network to form a fuzzy neural network with enhanced performance in image segmentation.

This is a preview of subscription content, access via your institution

Access Nature and 54 other Nature Portfolio journals

Get Nature+, our best-value online-access subscription

$29.99 / 30 days

cancel any time

Subscribe to this journal

Receive 12 digital issues and online access to articles

$119.00 per year

only $9.92 per issue

Buy this article

Prices may be subject to local taxes which are calculated during checkout

The data that support the findings of this study are available via the Harvard Dataverse repository at https://doi.org/10.7910/DVN/VBOVVW.

The code used in this study is available via GitHub at https://github.com/hexu2333/Unet-with-Fuzzy-Layer.

Varghese, B., Wang, N., Barbhuiya, S., Kilpatrick, P. & Nikolopoulos, D. S. Challenges and opportunities in edge computing. In 2016 IEEE International Conference on Smart Cloud (SmartCloud) 20–26 (IEEE, 2016).

Shi, W., Cao, J., Zhang, Q., Li, Y. & Xu, L. Edge computing: vision and challenges. IEEE Internet Things J. 3, 637–646 (2016).

Article Google Scholar

Mendel, J. M. Fuzzy logic systems for engineering: a tutorial. Proc. IEEE 83, 345–377 (1995).

Article Google Scholar

van der Wal, A. J. Application of fuzzy logic control in industry. Fuzzy Sets Syst. 74, 33–41 (1995).

Article Google Scholar

Hitzler, P. & Sarker, M. K. Neuro-Symbolic Artificial Intelligence: The State of the Art (IOS Press, 2022).

Baturone, I., Barriga, A., Jimenez-Fernandez, C., Lopez, D. R. & Sanchez-Solano, S. Microelectronic Design of Fuzzy Logic-Based Systems (CRC Press, 2018).

Peyravi, H., Khoei, A. & Hadidi, K. Design of an analog CMOS fuzzy logic controller chip. Fuzzy Sets Syst. 132, 245–260 (2002).

Article MathSciNet Google Scholar

Wang, W.-z. & Jin, D.-m. Neuro-fuzzy system with high-speed low-power analog blocks. Fuzzy Sets Syst. 157, 2974–2982 (2006).

Article MathSciNet Google Scholar

Baradaranrezaeii, A., Zarei, M., Khalilzadegan, A., Khoei, A. & Hadidi, K. A CMOS reference-less membership function generator. In 2011 19th Iranian Conference on Electrical Engineering 1–6 (IEEE, 2011).

Khalilzadegan, A., Khoei, A. & Hadidi, K. Circuit implementation of a fully programmable and continuously slope tunable triangular/trapezoidal membership function generator. Analog Integr. Circuits Signal Process. 71, 561–570 (2012).

Article Google Scholar

Yaghmourali, Y. V., Fathi, A., Hassanzadazar, M., Khoei, A. & Hadidi, K. A low-power, fully programmable membership function generator using both transconductance and current modes. Fuzzy Sets Syst. 337, 128–142 (2018).

Article MathSciNet Google Scholar

Jooq, M. K. Q., Behbahani, F., Al-Shidaifat, A., Khan, S. R. & Song, H. A high-performance and ultra-efficient fully programmable fuzzy membership function generator using FinFET technology for image enhancement. Int. J. Electron. Commun. 163, 154598 (2023).

Article Google Scholar

Li, H. et al. Interfacial interactions in van der Waals heterostructures of MoS2 and graphene. ACS Nano 11, 11714–11723 (2017).

Article Google Scholar

Johnson, M. A. & Moradi, M. H. PID Control (Springer, 2005).

Buckley, J. J. & Hayashi, Y. J. Fuzzy neural networks: a survey. Fuzzy Sets Syst. 66, 1–13 (1994).

Article MathSciNet Google Scholar

de Campos Souza, P. V. Fuzzy neural networks and neuro-fuzzy networks: a review the main techniques and applications used in the literature. Appl. Soft Comput. 92, 106275 (2020).

Article Google Scholar

Mak, K. F. et al. Tightly bound trions in monolayer MoS2. Nat. Mater. 12, 207–211 (2013).

Article Google Scholar

Craciun, M. et al. Trilayer graphene is a semimetal with a gate-tunable band overlap. Nat. Nanotechnol. 4, 383–388 (2009).

Article Google Scholar

Shih, C.-J. et al. Tuning on–off current ratio and field-effect mobility in a MoS2–graphene heterostructure via Schottky barrier modulation. ACS Nano 8, 5790–5798 (2014).

Article Google Scholar

Lee, C.-H. et al. Atomically thin p–n junctions with van der Waals heterointerfaces. Nat. Nanotechnol. 9, 676–681 (2014).

Article Google Scholar

Zhang, X. et al. Near-ideal van der Waals rectifiers based on all-two-dimensional Schottky junctions. Nat. Commun. 12, 1522 (2021).

Article Google Scholar

Lee, H. S. et al. Metal semiconductor field-effect transistor with MoS2/conducting NiOx van der Waals Schottky interface for intrinsic high mobility and photoswitching speed. ACS Nano 9, 8312–8320 (2015).

Article Google Scholar

Shin, H. G. et al. Vertical and in-plane current devices using NbS2/n-MoS2 van der Waals Schottky junction and graphene contact. Nano Lett. 18, 1937–1945 (2018).

Article Google Scholar

Wang, J. et al. Transferred metal gate to 2D semiconductors for sub-1 V operation and near ideal subthreshold slope. Sci. Adv. 7, eabf8744 (2021).

Article Google Scholar

Fu, J. et al. Photo‐driven semimetal–semiconductor field‐effect transistors. Adv. Opt. Mater. 11, 2201983 (2023).

Article Google Scholar

Parker, A. E. & Skellern, D. J. A realistic large-signal MESFET model for SPICE. IEEE Trans. Microw. Theory Tech. 45, 1563–1571 (1997).

Article Google Scholar

Ning, T. H. & Cai, J. On the performance and scaling of symmetric lateral bipolar transistors on SOI. IEEE J. Electron Devices Soc. 1, 21–27 (2013).

Article Google Scholar

Mishra, S., Singh, V. K. & Pal, B. B. Effect of radiation and surface recombination on the characteristics of an ion-implanted GaAs MESFET. IEEE Trans. Electron Devices 37, 2–10 (1990).

Article Google Scholar

Hájek, P. Metamathematics of Fuzzy Logic Vol. 4 (Springer, 2013).

Beck, M. E. et al. Spiking neurons from tunable Gaussian heterojunction transistors. Nat. Commun. 11, 1565 (2020).

Article Google Scholar

Yan, X. et al. Reconfigurable mixed-kernel heterojunction transistors for personalized support vector machine classification. Nat. Electron. 6, 862–869 (2023).

Article Google Scholar

Tang, K.-S., Man, K. F., Chen, G. & Kwong, S. An optimal fuzzy PID controller. IEEE Trans. Ind. Electron. 48, 757–765 (2001).

Article Google Scholar

MacVicar-Whelan, P. Fuzzy sets for man–machine interaction. Int. J. Man Mach. Stud. 8, 687–697 (1976).

Article Google Scholar

Mamdani, E. H. & Assilian, S. An experiment in linguistic synthesis with a fuzzy logic controller. Int. J. Man Mach. Stud. 7, 1–13 (1975).

Article Google Scholar

Guo, S., Peters, L. & Surmann, H. Design and application of an analog fuzzy logic controller. IEEE Trans. Fuzzy Syst. 4, 429–438 (1996).

Article Google Scholar

Ronneberger, O., Fischer, P. & Brox, T. U-Net: convolutional networks for biomedical image segmentation. In Medical Image Computing and Computer-Assisted Intervention—MICCAI 2015, Part III (eds Navab, N. et al.) 234–241 (Springer, 2015).

The Cityscapes Dataset; https://www.cityscapes-dataset.com/

Cordts, M. et al. The Cityscapes dataset for semantic urban scene understanding. In 2016 IEEE Conference on Computer Vision and Pattern Recognition (CVPR) 3213–3223 (IEEE, 2016).

Yang, J. J., Strukov, D. B. & Stewart, D. R. Memristive devices for computing. Nat. Nanotechnol. 8, 13–24 (2013).

Article Google Scholar

Yao, P. et al. Fully hardware-implemented memristor convolutional neural network. Nature 577, 641–646 (2020).

Article Google Scholar

Kim, M.-K., Kim, I.-J. & Lee, J.-S. CMOS-compatible compute-in-memory accelerators based on integrated ferroelectric synaptic arrays for convolution neural networks. Sci. Adv. 8, eabm8537 (2022).

Article Google Scholar

Dorzhigulov, A., Choubey, B. & James, A. P. Current controlled neuro-fuzzy membership function generation. In 2018 IEEE 61st International Midwest Symposium on Circuits and Systems (MWSCAS) 929–932 (IEEE, 2019).

Azimi, S. & Miar-Naimi, H. Designing programmable current-mode Gaussian and bell-shaped membership function. Analog Integr. Circuits Signal Process. 102, 323–330 (2020).

Article Google Scholar

Khaneshan, T. M., Nematzadeh, M., Khoei, A. & Hadidi, K. An analog reconfigurable Gaussian-shaped membership function generator using current-mode techniques. In 20th Iranian Conference on Electrical Engineering (ICEE2012) 145–149 (IEEE, 2012).

Lin, K.-J., Cheng, C.-J., Chiu, S.-F. & Su, H.-C. CMOS current-mode implementation of fractional-power functions. Circuits Syst. Signal Process. 31, 61–75 (2012).

Article MathSciNet Google Scholar

Saatlo, A. N. & Ozoguz, S. CMOS implementation of scalable Morlet wavelet for application in signal processing. In 2015 38th International Conference on Telecommunications and Signal Processing (TSP) 1–4 (IEEE, 2015).

Khayatzadeh, R. & Yelten, M. B. A novel multiple membership function generator for fuzzy logic systems. In 2018 15th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD) 101–104 (IEEE, 2018).

Bozorgmehr, A., Jooq, M. K. Q., Moaiyeri, M. H., Navi, K. & Bagherzadeh, N. A high-performance fully programmable membership function generator based on 10 nm gate-all-around CNTFETs. Int. J. Electron. Commun. 123, 153293 (2020).

Article Google Scholar

Ghasemian, H., Karami, S., Abiri, E. & Salehi, M. R. Design of a low power analog and multi-shaped fully programmable twin-cell membership function generator circuit in 65 nm CMOS technology. Circuits Syst. Signal Process. 40, 2–21 (2021).

Article Google Scholar

Yan, X. et al. Reconfigurable stochastic neurons based on tin oxide/MoS2 hetero-memristors for simulated annealing and the Boltzmann machine. Nat. Commun. 12, 5710 (2021).

Article Google Scholar

Download references

X.Y., J.H.Q. and M.C.H. acknowledge support from the US Department of Energy Office of Science ASCR and BES Microelectronics Threadwork Program (contract number DE-AC02-06CH11357) and the US National Science Foundation EFRI BRAID Program (contract number EFMA-2317974). N.Y. and J.G. acknowledge support from the US National Science Foundation (contract numbers 2203625 and 2007200).

These authors contributed equally: Hefei Liu, Jiangbin Wu, Jiahui Ma.

Ming Hsieh Department of Electrical and Computer Engineering, University of Southern California, Los Angeles, CA, USA

Hefei Liu, Jiahui Ma, Hongming Zhang & Ting-Hao Hsu

State Key Laboratory of Superlattices and Microstructures, Institute of Semiconductors, Chinese Academy of Sciences, Beijing, China

Jiangbin Wu

Department of Materials Science and Engineering, Northwestern University, Evanston, IL, USA

Xiaodong Yan, Justin H. Qian & Mark C. Hersam

Department of Electrical and Computer Engineering, University of Florida, Gainesville, FL, USA

Ning Yang & Jing Guo

Joint Institute, Shanghai Jiao Tong University, Shanghai, China

Xu He

Department of Electrical and Electronic Engineering, University of Hong Kong, Hong Kong, China

Yangu He & Han Wang

Department of Electrical and Computer Engineering, Northwestern University, Evanston, IL, USA

Mark C. Hersam

Department of Chemistry, Northwestern University, Evanston, IL, USA

Mark C. Hersam

You can also search for this author in PubMed Google Scholar

H.W., H.L. and J.W. conceived the project concept. H.W. supervised the entire project. H.W., H.L., J.W., J.M., X.Y. and M.C.H. designed the experiments and simulations. H.L., J.W., J.M., H.Z. and T.-H.H. fabricated the devices. H.L., J.W. and J.M. carried out the electrical measurements. N.Y. and J.G. carried out the device simulation. H.L., J.W., X.H. and Y.H. designed and carried out the FNN modelling. H.W., M.C.H., X.Y. and J.H.Q. participated in the experiments and data analysis. H.L., J.W. and H.W. co-wrote the paper. All authors discussed the results and provided inputs on the paper at all stages.

Correspondence to Mark C. Hersam or Han Wang.

The authors declare no competing interests.

Nature Electronics thanks Tao Liu and the other, anonymous, reviewer(s) for their contribution to the peer review of this work.

Publisher’s note Springer Nature remains neutral with regard to jurisdictional claims in published maps and institutional affiliations.

Supplementary Figs. 1–14, Notes 1–4 and Table 1.

Springer Nature or its licensor (e.g. a society or other partner) holds exclusive rights to this article under a publishing agreement with the author(s) or other rightsholder(s); author self-archiving of the accepted manuscript version of this article is solely governed by the terms of such publishing agreement and applicable law.

Reprints and permissions

Liu, H., Wu, J., Ma, J. et al. A van der Waals interfacial junction transistor for reconfigurable fuzzy logic hardware. Nat Electron (2024). https://doi.org/10.1038/s41928-024-01256-3

Download citation

Received: 16 January 2024

Accepted: 09 September 2024

Published: 15 October 2024

DOI: https://doi.org/10.1038/s41928-024-01256-3

Anyone you share the following link with will be able to read this content:

Sorry, a shareable link is not currently available for this article.

Provided by the Springer Nature SharedIt content-sharing initiative

News

A van der Waals interfacial junction transistor for reconfigurable fuzzy logic hardware | Nature Electronics